1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology and, more particularly, to a semiconductor memory device that may prevent data stored in a memory cell from being damaged or lost due to word line disturbance and a semiconductor memory system including the semiconductor memory device.
2. Description of the Related Art
As the integration degree of a memory device increases, the space between the word lines becomes narrower. As the gap between the word lines becomes narrower, the coupling effect between neighboring word lines increases.
Voltage levels of word lines toggle between an activation state and a deactivation state whenever data is inputted to/outputted from a memory cell. As the coupling effect between neighboring word lines increases, data may be affected in memory cells coupled to word lines that are adjacent to a frequently activated word line. This phenomenon is referred to as word line disturbance. In a worst case scenario, the data of a memory cell may be damaged to the point it is no longer recoverable, before the memory cell is refreshed, resulting in a loss of data.
FIG. 1 illustrates a portion of a cell array included in a memory device for describing word line disturbance.
Referring to FIG. 1, a word line WLL is activated a large number of times, and word lines WLL−1 and WLL+1 are disposed adjacent to the word line WLL. A memory cell CL is coupled with the word line WLL, and a memory cell CL−1 is coupled with the word line WLL−1, and a memory cell CL+1 is coupled with the word line WLL+1. The memory cells CL, CL−1 and CL+1 include cell transistors TL, TL−1 and TL+1 and cell capacitors CAPL, CAPL−1 and CAPL+1, respectively.
In FIG. 1, when the word line WLL is activated or deactivated, voltages of the word lines WLL−1 and the WLL+1 increase or decrease due to a coupling effect occurring between the word line WLL and the word line WLL−1 or the word line WLL and the word line WLL+1. The coupling effect has an influence on the charge of the cell capacitors CAPL−1 and CAPL+1. Therefore, when the voltage level of the word line WLL toggles between an activation state and a deactivation state, changes in the amount of charge stored in the cell capacitors CAPL−1 and CAPL+1 included in the memory cells CL−1 and CL+1 may increase, and data of the memory cells CL−1 and CL+1 may be damaged or even lost.
Also, data may be damaged or lost as electromagnetic waves are generated by neighboring circuits that are toggling between active and non-active states. These electromagnetic waves may induce an increase or decrease in the charge of capacitors in neighboring memory cells. And, as previously discussed, unintended changes in the charge of neighboring memory cells may result in the loss of data.